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  4. A Power-Efficient LVDS Driver Circuit in 0.18-μm CMOS Technology
 
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conference paper

A Power-Efficient LVDS Driver Circuit in 0.18-μm CMOS Technology

Tajalli, Armin  
•
Leblebici, Yusuf  
2007
Proceedings of 3rd IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
IEEE 3rd Conference on Ph. D. Research in Microelectronics and Electronics (PRIME)

This article presents a power-efficient and low-voltage CMOS output driver circuit based on low-voltage differential signaling (LVDS) standard. To reduce the ringing at the output of the proposed driver circuit and simultaneously keep the power consumption low, a new technique has been applied to control the output voltage slew. A pre-driver circuit is also utilized to have a very low total equivalent input capacitance of 50 fF. Designed in 0.18 μm CMOS technology, the entire output driver circuit including the input pre-driver, draws only 5.6 mArms while the output voltage swing is VOD = 400 mV and the other specs are compliant with the LVDS requirements.

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