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  4. Rethinking IOMMU for Future IO Devices
 
conference paper not in proceedings

Rethinking IOMMU for Future IO Devices

Kumar, Madhur  
•
Li, Yuanlong  
•
Etsion, Yoav
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March 30, 2025
30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

IO address translation has become a roadblock for high-speed IO devices to saturate their maximum bandwidth, as the aggregated IO working set can easily exceed the IOTLB coverage, leading to performance overhead of IO page table walks. Inspired by recent core-side virtual memory approaches that lower the OS-level virtual memory areas (VMAs) into hardware to solve the TLB coverage problem, we propose to introduce VMAs into IO address translation with a VMA-granule centralized translation caching design that can achieve both higher performance and stronger security guarantees.

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Type
conference paper not in proceedings
Author(s)
Kumar, Madhur  

EPFL

Li, Yuanlong  

EPFL

Etsion, Yoav
Bhattacharjee, Abhishek  

Yale University

Basu, Arkaprava
Falsafi, Babak  

EPFL

Kashyap, Sanidhya  

EPFL

Payer, Mathias  

EPFL

Date Issued

2025-03-30

Written at

EPFL

EPFL units
PARSA  
Event nameEvent acronymEvent placeEvent date
30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

ASPLOS '25

Rotterdam, The Netherlands

2025-03-30 - 2025-04-03

Available on Infoscience
August 25, 2025
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/253386
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