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conference paper

Efficient Hashing Using the AES Instruction Set

Bos, Joppe Willem  
•
Özen, Onur  
•
Stam, Martijn  
Preneel, Bart
•
Takagi, Tsuyoshi
2011
Cryptographic Hardware and Embedded Systems – CHES 2011
Cryptographic Hardware and Embedded Systems

In this work, we provide a software benchmark for a large range of 256-bit blockcipher-based hash functions. We instantiate the underlying blockcipher with AES, which allows us to exploit the recent AES instruction set (AESNI). Since AES itself only outputs 128 bits, we consider double-block-length constructions, as well as (single-block-length) constructions based on RIJNDAEL-256. Although we primarily target architectures supporting AES-NI, our framework has much broader applications by estimating the performance of these hash functions on any (micro-)architecture given AES-benchmark results. As far as we are aware, this is the first comprehensive performance comparison of multiblock- length hash functions in software.

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Name

ches2011.pdf

Type

Publisher's Version

Version

http://purl.org/coar/version/c_970fb48d4fbd8a85

Access type

openaccess

Size

294.93 KB

Format

Adobe PDF

Checksum (MD5)

0da641926991514486a3acda4cad2116

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