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  4. Low-power CMOS, analog transient-stability-simulator for a two-machine power-system
 
conference paper

Low-power CMOS, analog transient-stability-simulator for a two-machine power-system

Fried, R.
•
Cherkaoui, R.  
•
Enz, C.  
1997
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age. ISCAS '97 (Cat. No.97CH35987)

This paper presents a low-power analog simulator for the transient stability of a two-machine power system. The simulator is implemented in a standard digital CMOS process. Its building blocks are: sine shaper, transconductor with extended linear range, and parametric current amplifier. All these circuits operate in weak inversion and use the bulk as an active terminal. Simulation time is typically 104 times shorter than the real time simulated phenomena

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Type
conference paper
DOI
10.1109/ISCAS.1997.608635
Web of Science ID

WOS:A1997BJ47Z00035

Author(s)
Fried, R.
Cherkaoui, R.  
Enz, C.  
Date Issued

1997

Published in
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age. ISCAS '97 (Cat. No.97CH35987)
Volume

1

Start page

137

End page

40

Subjects

analogue simulation

•

CMOS analogue integrated circuits

•

parametric amplifiers

•

power system analysis computing

•

power system stability

•

power system transients

•

VLSI

•

low-power CMOS

•

analog transient-stability-simulator

•

two-machine power-system

•

sine shaper

•

transconductor

•

extended linear range

•

parametric current amplifier

•

weak inversion

•

simulation time

Editorial or Peer reviewed

REVIEWED

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Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/4434
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