conference paper
Low-power CMOS, analog transient-stability-simulator for a two-machine power-system
1997
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age. ISCAS '97 (Cat. No.97CH35987)
This paper presents a low-power analog simulator for the transient stability of a two-machine power system. The simulator is implemented in a standard digital CMOS process. Its building blocks are: sine shaper, transconductor with extended linear range, and parametric current amplifier. All these circuits operate in weak inversion and use the bulk as an active terminal. Simulation time is typically 104 times shorter than the real time simulated phenomena