Design of Cryo-CMOS Analog Circuits using the Gm/ID Approach
The Gm/ID approach has proven to be an efficient technique for the design of low-power analog circuits even in advanced technology nodes. It has already been shown that the normalized Gm/ID is actually a universal figure-of-merit (FoM) that is independent of technology and of device geometry. In addition, we will show experimentally in this paper that the normalized Gm/ID is also almost independent of temperature even down to cryogenic temperatures. Analog designers are currently struggling to design circuits that have to operate at cryogenic temperatures for quantum computing application. This is because the compact models available in the physical design kit (PDK) provided by foundries fail at cryogenic temperatures. While the models need to be improved to account for low-temperature physics, the Gm/ID approach can help designing cryo-CMOS analog circuits. In this paper we will show how it can be used for the design of a simple low-noise amplifier in a 16nm FinFET technology taking advantage of the temperature independence of Gm/ID.
WOS:001038214602083
2023-01-01
978-1-6654-5109-3
New York
IEEE International Symposium on Circuits and Systems
REVIEWED
Event name | Event place | Event date |
Monterey, CA | May 21-25, 2023 | |