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  4. Programming Heterogeneous CPU-GPU Systems by High-Level Dataflow Synthesis
 
conference paper

Programming Heterogeneous CPU-GPU Systems by High-Level Dataflow Synthesis

Bloch, Aurelien  
•
Bezati, Endri  
•
Mattavelli, Marco  
2020
Proceedings of the 2020 IEEE Workshop on Signal Processing Systems (SiPS)
2020 IEEE Workshop on Signal Processing Systems (SiPS)

Heterogeneous processing platforms combining in various architectures CPUs, GPUs, and programmable logic, are continuously evolving providing at each generation higher theoretical levels of computing performance. However, the challenge of how efficiently specify and explore the design space of applications executing on the different components of heterogeneous platforms remains an open problem and is the subject of many research efforts. The paper describes a dataflow based approach for the synthesis of applications to be executed on mixed CPU and GPU architectures. The new high-level approach consists of partitioning the application dataflow program written in RVC-CAL into CPU and GPU components, then on generating by automatic synthesis the C++ and CUDA programs that together implement the application executable. The design approach provides portability of applications on CPUs, GPUs, and mixed CPU/GPU architectures as well as the possibility of exploring the design space of all partitioning options without the need of rewriting the application code. The paper describes the essential methodology features at the base of the synthesis of CPU/GPU code and reports some example design cases validating the correctness of the approach.

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Type
conference paper
DOI
10.1109/SiPS50750.2020.9195250
Author(s)
Bloch, Aurelien  
Bezati, Endri  
Mattavelli, Marco  
Date Issued

2020

Publisher

IEEE

Published in
Proceedings of the 2020 IEEE Workshop on Signal Processing Systems (SiPS)
ISBN of the book

978-1-7281-8099-1

Total of pages

6

Start page

1

End page

6

Subjects

dynamic dataflow programs

•

RVC-CAL

•

parallel computing

•

source-to-source compiler

•

GPU programming

•

heterogeneous systems

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
SCI-STI-MM  
Event nameEvent placeEvent date
2020 IEEE Workshop on Signal Processing Systems (SiPS)

[Virtual Conference]

October 20 - 22, 2020

Available on Infoscience
March 11, 2021
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/175916
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