In this paper, we experimentally explore the transient negative capacitance effect in ferroelectric high-k gate stacks using multi-ferroelectric domain Si-doped HfO2 with and without the metal plane, MFMIS (TiN/Si:HfO2/TiN/SiO2) and MFIS (TiN/Si:HfO2/SiO2), respectively. With optimized 500ns pulsed measurements, we compare the reconstructed transient S-shaped P-E curves of the two gate stacks using 100nm ferroelectric multi-domains and distinguish the non-switching hysteresis-free NC effect from unstable FE switching hysteretic phenomena. We experimentally validate that the use of a metal layer in between the ferroelectric and the dielectric can inherently destabilize NC due to domain formation. Furthermore, from P-E of both ferroelectric stacks using 10 nm Si-doped HfO2, we extract the negative values of C-FE and prove that the metal plane provides 60% higher values of the negative capacitance for MFMIS, resulting in unstable hysteretic NC FET behavior. In contrast, the MFIS gate stack benefits from independent domain operation and achieves large and stable NC regions. We demonstrate that despite the smaller gain (amplification) of surface potential, the MFIS structure provides hysteresis-free stable performance boosting in all the regimes of operation of a 14nm UTB SOI MOSFET and can be recommended as performance booster advanced NC FETs.