Benefits and Challenges of Designing Cryogenic CMOS RF Circuits for Quantum Computers
Accurate and low-noise generation and amplification of microwave signals are required for the manipulation and readout of quantum bits (qubits). A fault-tolerant quantum computer operates at deep cryogenic temperatures (i.e., <100 mK) and requires thousands of qubits for running practical quantum algorithms. Consequently, CMOS radio-frequency (RF) integrated circuits operating at cryogenic temperatures down to 4 K (Cryo-CMOS) offer a higher level of system integration and scalability for future quantum computers. In this paper, we extensively discuss the role, benefits, and constraints of Cryo-CMOS for qubits control and readout. The main characteristics of the CMOS transistors and their impacts on RF circuit designs are described. Furthermore, opportunities and challenges of low noise RF signal generation and amplification are investigated.
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Mehrpoo, M., Patra, B., Gong, J., ’t Hart, P. A., van Dijk, J. P. G., Homulle, H., Kiene, G., Vladimirescu, A., Sebastiano, F., Charbon, E., & Babaie, M. (2019, January 1). Benefits and Challenges of Designing Cryogenic CMOS RF Circuits for Quantum Computers. 2019 Ieee International Symposium on Circuits and Systems (Iscas), IEEE International Symposium on Circuits and Systems. IEEE International Symposium on Circuits and Systems (IEEE ISCAS), Sapporo, JAPAN. https://doi.org/10.1109/ISCAS.2019.8702452
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WOS:000483076401129
2019-01-01
New York
978-1-7281-0397-6
IEEE International Symposium on Circuits and Systems
REVIEWED
EPFL
| Event name | Event place | Event date |
Sapporo, JAPAN | May 26-29, 2019 | |