Repository logo

Infoscience

  • English
  • French
Log In
Logo EPFL, École polytechnique fédérale de Lausanne

Infoscience

  • English
  • French
Log In
  1. Home
  2. Academic and Research Output
  3. Journal articles
  4. Forge: Generating a High Performance DSL Implementation from a Declarative Specification
 
research article

Forge: Generating a High Performance DSL Implementation from a Declarative Specification

Sujeeth, Arvind K.
•
Gibbons, Austin
•
Brown, Kevin J.
Show more
2014
Acm Sigplan Notices

Domain-specific languages provide a promising path to automatically compile high-level code to parallel, heterogeneous, and distributed hardware. However, in practice high performance DSLs still require considerable software expertise to develop and force users into tool-chains that hinder prototyping and debugging. To address these problems, we present Forge, a new meta DSL for declaratively specifying high performance embedded DSLs. Forge provides DSL authors with high-level abstractions (e.g., data structures, parallel patterns, effects) for specifying their DSL in a way that permits high performance. From this high-level specification, Forge automatically generates both a naive Scala library implementation of the DSL and a high performance version using the Delite DSL framework. Users of a Forge-generated DSL can prototype their application using the library version, and then switch to the Delite version to run on multicore CPUs, GPUs, and clusters without changing the application code. Forge-generated Delite DSLs perform within 2x of hand-optimized C++ and up to 40x better than Spark, an alternative high-level distributed programming environment. Compared to a manually implemented Delite DSL, Forge provides a factor of 3-6x reduction in lines of code and does not sacrifice any performance. Furthermore, Forge specifications can be generated from existing Scala libraries, are easy to maintain, shield DSL developers from changes in the Delite framework, and enable DSLs to be retargeted to other frameworks transparently.

  • Details
  • Metrics
Type
research article
DOI
10.1145/2517208.2517220
Web of Science ID

WOS:000338625500017

Author(s)
Sujeeth, Arvind K.
Gibbons, Austin
Brown, Kevin J.
Lee, Hyoukjoong
Rompf, Tiark  
Odersky, Martin  
Olukotun, Kunle
Date Issued

2014

Publisher

Assoc Computing Machinery

Published in
Acm Sigplan Notices
Volume

49

Issue

3

Start page

145

End page

154

Subjects

Code Generation

•

Multi-Stage Programming

•

Domain-Specific Languages

•

Parallel Programming

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LAMP1  
Available on Infoscience
August 29, 2014
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/106100
Logo EPFL, École polytechnique fédérale de Lausanne
  • Contact
  • infoscience@epfl.ch

  • Follow us on Facebook
  • Follow us on Instagram
  • Follow us on LinkedIn
  • Follow us on X
  • Follow us on Youtube
AccessibilityLegal noticePrivacy policyCookie settingsEnd User AgreementGet helpFeedback

Infoscience is a service managed and provided by the Library and IT Services of EPFL. © EPFL, tous droits réservés