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conference paper

Steep Slope Transistors for Quantum Computing

Ionescu, Mihai Adrian  
•
Rosca, Teodor  
•
Alper, Cem  
July 31, 2018
Proceedings of the 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)
IEEE 2nd Electron Devices Technology and Manufacturing Conference - EDTM 2018

In this paper we will present and discuss the potential of steep slope transistors to serve at cryogenic temperature: (i) the electronic design that is needed for qubit error correction and/or interfacing and (ii) to serve as ultra-sensitive charge detectors and potentially replace single electron transistors and/or CMOS for certain electronic functions. We suggest that among the various categories of steep slope devices, the heterojunction tunnel FETs compatible with CMOS platforms form a class of device candidates capable to play an important role in the future quantum computing (QC) down to cryogenic temperatures. The paper will investigate and discuss the potential merits of these devices.

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Type
conference paper
DOI
10.1109/EDTM.2018.8421422
Author(s)
Ionescu, Mihai Adrian  
Rosca, Teodor  
Alper, Cem  
Date Issued

2018-07-31

Publisher

IEEE

Published in
Proceedings of the 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)
ISBN of the book

978-1-5386-3712-8

Start page

56

End page

58

Editorial or Peer reviewed

NON-REVIEWED

Written at

EPFL

EPFL units
NANOLAB  
Event nameEvent placeEvent date
IEEE 2nd Electron Devices Technology and Manufacturing Conference - EDTM 2018

Kobe, Japan

13-16 March 2018

Available on Infoscience
January 27, 2020
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/164942
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