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  4. In Medio Stat Virtus: Combining Boolean and Pattern Matching
 
conference paper

In Medio Stat Virtus: Combining Boolean and Pattern Matching

Radi, Gianluca  
•
Tempia Calvino, Alessandro  
•
De Micheli, Giovanni  
January 22, 2024
29Th Asia And South Pacific Design Automation Conference, Asp-Dac 2024
29th Asia and South Pacific Design Automation Conference (ASP-DAC)

Technology mapping transforms a technology-independent representation into a technology-dependent one given a library of cells. This process is performed by means of local replacements that are extracted by matching sections of the subject graph to library cells. Matching techniques are classified mainly into pattern and Boolean. These two techniques differ in quality and number of generated matches, scalability, and run time. This paper proposes hybrid matching, a new methodology that integrates both techniques in a technology mapping algorithm. In particular, pattern matching is used to speed up the matching phase and support large cells. Boolean matching is used to increase the number of matches and quality. Compared to Boolean matching, we show that hybrid matching yields an average reduction in the area and run time by 6% and 25%, respectively, with similar delay.

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Type
conference paper
DOI
10.1109/ASP-DAC58780.2024.10473889
Web of Science ID

WOS:001196002900065

Author(s)
Radi, Gianluca  
Tempia Calvino, Alessandro  
De Micheli, Giovanni  
Date Issued

2024-01-22

Publisher

IEEE

Publisher place

New York

Published in
29Th Asia And South Pacific Design Automation Conference, Asp-Dac 2024
ISBN of the book

979-8-3503-9354-5

Total of pages

7

Start page

404

End page

410

Subjects

EDA

•

Logic synthesis

•

Technology Mapping

•

ASICs

•

Boolean matching

•

Pattern matching

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LSI1  
Event nameEvent placeEvent date
29th Asia and South Pacific Design Automation Conference (ASP-DAC)

Incheon Songdo Convensia, South Korea

January 22-25, 2024

FunderGrant Number

SNF grant "Supercool: Design methods and tools for superconducting electronics"

200021 1920981

Synopsys Inc.

Available on Infoscience
November 21, 2023
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/202325
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