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  4. A Reconfigurable High Dynamic Range Delta-Sigma Front End with Event-Based Decimation for Bandwidth-EfficientImplantable Neural Interfaces
 
conference paper

A Reconfigurable High Dynamic Range Delta-Sigma Front End with Event-Based Decimation for Bandwidth-EfficientImplantable Neural Interfaces

Martinez, Natalia
•
Sapriza, Juan  
•
Schiavone, Pasquale Davide  
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May 28, 2025
2025 IEEE International Symposium on Circuits and Systems

As the demand for high channel counts and high-resolution recordings of neural activity continues to grow, the increased power and data rate generated impose hard constraints on the telemetry capabilities of wireless implantable neural interfaces. To address this challenge, this work presents a novel system architecture for a reconfigurable readout circuit. It provides per-channel data rate reduction and adaptable bandwidth to match the characteristics and evolution of the neural signals under non-ideal electrode-tissue interactions. The system consists of a 14-bit hybrid continuous-time/discrete-time (CT/DT) delta-sigma analog front-end (AFE) followed by event-based decimation (EBD) which exploits the inherent sparsity in neural signals. The proposed AFE and EBD co-design was simulated using artifact-laden nonhuman primate microwire recordings. Results demonstrate a dynamic range of 76 dB, ensuring artifact robustness, along with up to a two-order-of-magnitude reduction in output data rate and power-area decimation footprint per channel, offering flexibility for high-quality (14 dB NRMSE) and medium-quality (8 dB NRMSE) reconstructions, based on the characteristics of the neural signals recorded at each channel.

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Type
conference paper
Author(s)
Martinez, Natalia

Imperial College London

Sapriza, Juan  

EPFL

Schiavone, Pasquale Davide  

EPFL

Bashford, Luke

Newcastle University

Jackson, Andrew

Newcastle University

Ansaloni, Giovanni  

EPFL

Constandinou, Timothy

Imperial College London

Atienza, David  

EPFL

Date Issued

2025-05-28

Published in
Proceedings. 2025 IEEE International Symposium on Circuits and Systems [Forthcoming publication]
Subjects

mplantable neural interfaces

•

neural recording

•

delta-sigma

•

event-based compression

•

brain-computer interfaces

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
ESL  
Event nameEvent acronymEvent placeEvent date
2025 IEEE International Symposium on Circuits and Systems

ISCAS

London, UK

2025-05-25 - 2025-05-28

Available on Infoscience
February 18, 2025
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/246984.2
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