Channel coding has become an indispensable component of modern communication systems. By introducing redundancy into the transmitted data, it enables the receiver to detect and correct errors without feedback, thereby significantly improving the efficiency of transceivers. As wireless standards continue to evolve, particularly toward 6G, channel coding faces ever greater demands on performance, flexibility, and implementation efficiency. However, the increasing complexity of advanced decoders, combined with the slowdown of Moore's law, has made it challenging to bridge the gap between coding theory and hardware implementation. Given that polar codes and low-density parity-check (LDPC) codes have been ratified as the 5G New Radio (NR) standard codes, the design of efficient decoders for these two modern codes has become a central bottleneck for 5G-NR and beyond.

In addition to support for varying block sizes, code rates, and code structures, 5G-NR imposes strict demands on polar codes and LDPC codes in terms of reliability, latency, and throughput. These challenges call for a cross-layer design perspective to tightly integrate algorithmic efficiency with architectural scalability. As a newly adopted class of codes in 5G, polar codes face challenges in low-latency and high-reliability of decoders. While node-based successive cancellation list (SCL) decoding has emerged as an effective approach to reduce the latency of SCL decoding, current node-based decoders are often constrained by their limited ability to generalize across diverse node types. This restricts their flexibility and leaves room for improvement in decoding speed. In this thesis, we propose a generalized node-based SCL decoder to minimize latency in single-frame polar decoding. Moreover, we introduce a frame-interleaving architecture to explore the throughput potential of polar decoders. For LDPC codes, the primary challenge in 5G-NR is to support a wide range of code configurations while meeting the required peak throughput. To this end, we develop a fully reconfigurable 5G-NR LDPC decoder architecture to fulfill these requirements. In summary, we present algorithmic and architectural optimizations for 5G-NR codes, along with two decoder implementations that are currently among the most efficient designs meeting the standard requirements.

Meanwhile, as 5G is making inroads to commercial devices, the global research community is actively exploring candidates for 6G channel coding. In contrast to 5G-NR, where code constructions are already fixed, the transition to 6G offers an opportunity to incorporate code design itself into the innovation process, prompting a revisit of coding schemes, decoding algorithms, and hardware architectures. In this thesis, we propose a new spatially-coupled LDPC code family called edge-spreading Raptor-like (ESRL) LDPC codes as a candidate for 6G next-generation mobile broadband. While preserving key features of 5G-NR standard codes, the proposed ESRL codes have advantages in error-rate performance, throughput, and hardware complexity compared to 5G-NR LDPC codes. To effectively realize the theoretical advantages in practice, we further present a fully reconfigurable high-throughput LDPC decoder implementation for ESRL codes. This ASIC can support a wide range of code rates and code lengths (up to five times longer than 5G) and achieve a high peak throughput of more than 100 Gbps, making it a promising solution for 6G wireless systems.