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  4. Cryogenic InGaAs HEMTs with Record-Low On-Resistance using Optimized Channel Structure
 
conference paper

Cryogenic InGaAs HEMTs with Record-Low On-Resistance using Optimized Channel Structure

Cha, E.
•
Ferraris, A.
•
Caimi, D.
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2024
International Electron Devices Meeting (IEDM)
2024 IEEE International Electron Devices Meeting (IEDM)

We present cryogenic InGaAs HEMTs showing record-low on-resistance and noise characteristics for low-power qubit readout. Our analysis focuses on transistors with different indium channel compositions, 70%, 75%, and 80%, to explain its impact on cryogenic low-noise and low-power properties. We show that increasing indium content enhances the tunneling probability, reducing the barrier resistance at 4 K, leading to the lowest reported RON to date, 198 Ω·µm at LG = 170 nm. The influence on cryogenic subthreshold properties and disorder characteristics is also studied. InGaAs HEMTs with a 75% indium channel content exhibit SS < 10 mV/dec, along with gm = 2.3 mS/µm, resulting in a record-low noise indication factor of √IDS/gm = 0.15 √V∙mm/S for cryogenic HEMTs. These results emphasize the importance of channel structure engineering in enhancing the performance of cryogenic InGaAs HEMTs for future large-scale quantum computing applications.

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