Repository logo

Infoscience

  • English
  • French
Log In
Logo EPFL, École polytechnique fédérale de Lausanne

Infoscience

  • English
  • French
Log In
  1. Home
  2. Academic and Research Output
  3. Conferences, Workshops, Symposiums, and Seminars
  4. Enhanced Wafer Matching Heuristics for 3-D ICs
 
conference paper

Enhanced Wafer Matching Heuristics for 3-D ICs

Pavlidis, Vasileios  
•
Xu, Hu  
•
De Micheli, Giovanni  
2012
Proceedings of the IEEE 17th European Test Symposium
IEEE 17th European Test Symposium
  • Files
  • Details
  • Metrics
Type
conference paper
DOI
10.1109/ETS.2012.6233032
Web of Science ID

WOS:000309227500033

Author(s)
Pavlidis, Vasileios  
Xu, Hu  
De Micheli, Giovanni  
Date Issued

2012

Publisher

Ieee

Publisher place

New York

Published in
Proceedings of the IEEE 17th European Test Symposium
ISBN of the book

978-1-4673-0697-3

Total of pages

1

Series title/Series vol.

Proceedings of the European Test Symposium

Start page

178

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LSI1  
Event nameEvent placeEvent date
IEEE 17th European Test Symposium

Annecy, France

May 28- June 1, 2012

Available on Infoscience
July 20, 2012
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/84078
Logo EPFL, École polytechnique fédérale de Lausanne
  • Contact
  • infoscience@epfl.ch

  • Follow us on Facebook
  • Follow us on Instagram
  • Follow us on LinkedIn
  • Follow us on X
  • Follow us on Youtube
AccessibilityLegal noticePrivacy policyCookie settingsEnd User AgreementGet helpFeedback

Infoscience is a service managed and provided by the Library and IT Services of EPFL. © EPFL, tous droits réservés