conference paper
Characterization and physical modeling of endurance in embedded non-volatile memory technology
2011
Proceedings of the 3rd IEEE International Memory Workshop
Transient and endurance mechanisms in highperformance embedded non-volatile memory flash devices are investigated in detail. An extraction methodology combining measurements on equivalent transistors and flash cells is proposed to discriminate the effects of defects on program/erase (P/E) efficiencies and on DC characteristics. A semi-analytical multiphonon-assisted charge trapping model is used to investigate the role and the impact of trapped charges on channel hotelectron injection and Fowler-Nordheim efficiencies, threshold voltage variations and endurance characteristics. © 2011 IEEE.
Type
conference paper
Author(s)
Zaka, A.
Manceau, J.-P.
Rideau, D.
Dornel, E.
Clark, W. F.
Jaouen, H.
Date Issued
2011
Published in
Proceedings of the 3rd IEEE International Memory Workshop
Editorial or Peer reviewed
REVIEWED
Written at
EPFL
EPFL units
Event name | Event place | Event date |
Monterey, California, USA | May 22-25, 2011 | |
Available on Infoscience
October 31, 2011
Use this identifier to reference this record