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  4. A capacitance-voltage model for DG-TFET
 
conference paper

A capacitance-voltage model for DG-TFET

Biswas, Arnab  
•
Ionescu, Mihai Adrian  
2015
2015 Silicon Nanoelectronics Workshop (SNW)
IEEE Silicon Nanoelectronics Workshop
  • Details
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Type
conference paper
Author(s)
Biswas, Arnab  
Ionescu, Mihai Adrian  
Date Issued

2015

Publisher

IEEE, Piscataway, NJ, USA

Published in
2015 Silicon Nanoelectronics Workshop (SNW)
Start page

1

End page

2

Subjects

field effect transistors

•

semiconductor device measurement

•

technology CAD (electronics)

URL

URL

http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7275314&filter=AND%28p_Publication_Number:7259952%29
Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
NANOLAB  
Event nameEvent placeEvent date
IEEE Silicon Nanoelectronics Workshop

Kyoto, Japan

14-15 June 2015

Available on Infoscience
November 23, 2015
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/120748
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