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research article

Why STM can be more than a Research Toy

Dragojevic, Aleksandar  
•
Felber, Pascal
•
Gramoli, Vincent  
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2011
Communications of the ACM

Software Transactional Memory (STM) promises to simplify concurrent programming without requiring specific hardware support. Yet, STM’s credibility lies on the extent to which it enables to leverage multicores and outperform sequential code. A recent CACM paper [3] questioned this ability and suggested the confinement of STM to a research toy. We revisit these conclusions through the most to date extensive comparison of STM performance to sequential code. We evaluate a state-of-the-art STM system, SwissTM, on a wide range of benchmarks and two different multicore systems. We dissect the inherent costs of synchronization as well as the overheads of compiler instrumentation and transparent privatization. Our results show that an STM with manually instrumented benchmarks and explicit privatization outperforms sequential code by up to 29 times on SPARC with 64 concurrent threads and by up to 9 times on x86 with 16 concurrent threads. Indeed the overheads of compiler instrumentation and transparent privatization are substantial, yet they do not prevent STM from generally outperforming sequential code.

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Type
research article
DOI
10.1145/1924421.1924440
Web of Science ID

WOS:000289939100023

Author(s)
Dragojevic, Aleksandar  
Felber, Pascal
Gramoli, Vincent  
Guerraoui, Rachid  
Date Issued

2011

Published in
Communications of the ACM
Volume

54

Start page

70

End page

77

Subjects

Software Transactional Memory

•

Performance

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
DCL  
Available on Infoscience
February 2, 2010
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/46357
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