Nowadays, the internet of things (IoT) nodes have started to spread in various domains of our society, from the industrial to the domestic environment. The remote sensing is one among their fundamental functions. The implementation of a radio detection and ranging (RADAR or radar) system in the millimeter wave (mm-wave) for vital signs monitoring, hand gestures recognition and localization frequency band has become more and more attractive over the past decade thanks to a large available bandwidth and an uncongested spectrum. In particular, the frequency-modulated continuous wave (FMCW) radars greatly benefit from the high carrier frequency and the multi-gigahertz bandwidth for the improvement of the angular and the radial resolution. This thesis focuses primarily on the analysis and the design of rf and mm-wave circuits for frequency generation for FMCW radars in advanced CMOS technologies, namely 28-nm bulk and 22-nm fully-depleted silicon-on-insulator (FDSOI). The first fundamental step of this process is to analyze the performance of the devices available in such technologies from dc to rf. The transistors are characterized to extract the parameters of the simplified Enz-Krummenacher-Vittoz (EKV) model from dc measurements. A simple model for the output conductance versus the inversion coefficient (IC) for short-channel devices is proposed introducing an additional parameter. Moreover, the linearity of the devices is modeled with the simplified EKV which allows to predict the harmonic distortion and the other metrics as a function of IC. This was the missing piece in the EKV framework and it is validated versus measurements of short devices. The second important step is to analyze the several harmonic (LC) oscillator topologies in the literature with the IC methodology in order to evaluate which bias region is the most power efficient for each of them. The same approach is used to study the phase noise in the 1/f2 region including all the noise sources of the transistors. These analyses indicate clearly that once again the moderate inversion is the sweet spot to design a low-power cross-coupled pair. The last crucial step is the implementation of the low-power and wide-tuning range oscillator required in a phase-locked loop (PLL) for a FMCW radar. Two different solutions are proposed. The first is an oscillator at 20 GHz. In order to assess the most suited topology and tuning technique two 20-GHz class-C LC oscillators are designed in 28-nm bulk technology, one relying only on switched capacitors (DCO) and another with both switched capacitors and varactors (VCO). Thanks to the higher quality factor of the metal capacitors compared to varactors at such frequency, the DCO performs better in terms of phase noise for a similar power consumption of 1.2 mW in low-voltage conditions with an very large frequency tuning range of 5.8 GHz (27 %). The second solution is a DCO at 60 GHz. In order to ease the generation of a monotonic and linear chirp over several gigahertz in an all-digital PLL (ADPLL), a property of oscillators coupled in quadrature is exploited to obtain a very large tuning range without resorting to multiple banks of switched capacitors. This technique is applied in the design of a 60-GHz quadrature DCO in 22-nm FDOSOI technology. The oscillator achieves an extremely large seamless frequency tuning range of 11 GHz, a total range of 16.7 GHz (26 %) and an average power consumption of 10.4 mW.