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  4. Multigate Buckled Self-Aligned Dual Si Nanowire MOSFETs on Bulk Si for High Electron Mobility
 
research article

Multigate Buckled Self-Aligned Dual Si Nanowire MOSFETs on Bulk Si for High Electron Mobility

Najmzadeh, Mohammad  
•
Tsuchiya, Yoshishige
•
Bouvet, Didier  
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2012
IEEE Transactions on Nanotechnology

In this paper, we report for the first time making multi-gate buckled self-aligned dual Si nanowires including two sub-100 nm cross-section cores on bulk Si substrate using optical lithography, hard mask/spacer technology and local oxidation. 0.8 GPa uniaxial tensile stress was measured on the buckled dual nanowires using micro-Raman spectroscopy. The buckled multi-gate dual Si nanowires show excellent electrical characteristics e.g. 62 mV/dec. and 42% low-field electron mobility enhancement due to uniaxial tensile stress in comparison to the non-strained device, all at VDS=50 mV and 293 K.

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Type
research article
DOI
10.1109/TNANO.2012.2205401
Web of Science ID

WOS:000308464100008

Author(s)
Najmzadeh, Mohammad  
Tsuchiya, Yoshishige
Bouvet, Didier  
Grabinski, Wladyslaw  
Ionescu, Mihai Adrian  
Date Issued

2012

Publisher

Institute of Electrical and Electronics Engineers

Published in
IEEE Transactions on Nanotechnology
Volume

11

Start page

902

End page

906

Subjects

Si nanowire

•

Multi-gate

•

CMOS boosters

•

Uniaxial tensile stress

•

Low-field mobility extraction in nanoscale

•

Micro-Raman spectroscopy

•

Optical/electrical characterization methods in nanoscale

Editorial or Peer reviewed

REVIEWED

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Available on Infoscience
June 19, 2012
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/81955
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