<i>Biconditional Binary Decision Diagrams</i> (BBDDs) are a novel class of canonical binary decision diagrams where the branching condition, and its associated logic expansion is <i>biconditional</i> on two variables. In this demonstration we use an efficient BBDD manipulation package as front-end to a commercial synthesis tool to restructure arithmetic operations in critical components of telecommunication circuits. We show that our approach meets tight timing constraints otherwise beyond the capabilities of traditional synthesis methods.