Multi-Processor Operating System Emulation Framework with Thermal Feedback for Systems-on-Chip

Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power density, which may lead to thermal runaway if coupled with low-cost packaging and cooling. Hence, mechanisms to efficiently evaluate the effectiveness of advanced thermal-aware operating-system (OS) strategies (e.g. task migration) onto the available MPSoC hardware are needed. In this paper, we propose a new MPSoC OS emulation framework that enables the study of thermal management strategies at the architectural- and OS-levels with the help of a standard FPGA. This framework includes the hardware and software components needed to accurately model complex MPSoCs architectures, and to test the effects of run-time thermal management strategies at the OS/middleware level with real-life inputs. Our results show that migration overhead is negligible w.r.t. temperature timings, enabling the development of thermal-aware migration strategies. Moreover, the effectiveness of the monitoring and feedback mechanism provides an emulation performance only ten times slower than real time.

Published in:
Proceedings of 17th ACM Great Lakes Symposium on VLSI (GLSVLSI), 311-316
Presented at:
17th ACM Great Lakes Symposium on VLSI (GLSVLSI), Stresa - Lago Maggiore, Italy, March 11-13, 2007

 Record created 2007-01-18, last modified 2018-03-18

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