Hardware spiking neural network with run-time reconfigurable connectivity in an autonomous robot

Roggen, D.; Hofmann, S.; Thoma, Y.; Floreano, D.

Hardware spiking neural network with run-time reconfigurable connectivity in an autonomous robot

Roggen, D. ; Hofmann, S. ; Thoma, Y. ; Floreano, D.

A cellular hardware implementation of a spiking neural network with run-time reconfigurable connectivity is presented. It is implemented on a compact custom FPGA board which provides a powerful reconfigurable hardware platform for hardware and software design. Complementing the system, a CPU synthesized on the FPGA takes care of interfacing the network with the external world. The FPGA board and the hardware network are demonstrated in the form of a controller embedded on the Khepera robot for a task of obstacle avoidance. Finally, future implementations on new multi-cellular hardware are discussed.

Published in:

NASA/DoD Conference on Evolvable Hardware (EH'2003), 189-198

Presented at:

NASA/DoD Conference on Evolvable Hardware (EH'2003), Chicago, Illinois, USA, July 9-11

Year:

2003

Keywords:

POEtic ; Evolutionary Robotics

Note:

Lohn, J. and Zebulum, R. and Steincamp, J. and Keymeulen, D. and Stoica, A. and Ferguson, M. I. (eds.)

Laboratories:

LIS
LSL