Low-Power Current Mode Logic for Improved DPA-Resistance in Embedded Systems
In this work, MOS Current Mode Logic (MCML) is analyzed for low power, low noise, mixed signal applications demanding high security such as embedded cryptographic processors and smart cards. We emphasize the possible extension of MCML gate usage for low speed applications requiring high noise immunity and having strict specifications regarding the input pattern-dependence with respect to current drawn from the power supply for better data security. A set of logic gates were realized using 0.18um CMOS technology, and their performance has been compared to static CMOS gates, showing one to two orders of magnitude improvement.
WOS:000232002401054
2005
2
1059
1062
REVIEWED
Event name | Event place | Event date |
Kobe, Japan | May 23-26 | |