Infoscience

Conference paper

Implementation of a Low-Power 200 MSample/s 12-bit Pipelined ADC Macro Using Deep-Submicron Digital CMOS Technology

    Note:

    2002 ASIC/SOC Conference, Rochester - NY, September 2002

    Reference

    • LSM-CONF-2002-002

    Record created on 2005-08-30, modified on 2016-08-08

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