Implementation of a Low-Power 200 MSample/s 12-bit Pipelined ADC Macro Using Deep-Submicron Digital CMOS Technology


Presented at:
2002 ASIC/SOC Conference, Rochester - NY, September 2002
Year:
2002
Note:
2002 ASIC/SOC Conference, Rochester - NY, September 2002
Laboratories:




 Record created 2005-08-30, last modified 2018-03-17

n/a:
Download fulltext
PDF

Rate this document:

Rate this document:
1
2
3
 
(Not yet reviewed)