Time-sensitive networks provide worst-case guarantees for applications in domains such as the automobile, automation, avionics, and the space industries. A violation of these guarantees can cause considerable financial loss and serious damage to human lives. To avoid this, it is crucial to provide a deterministic analysis of time-sensitive networks. Our analysis is based on network calculus, a framework for computing bounds on delay and backlog by using bit-level arrival-curve and service-curve characterizations. In this thesis, we focus on the analysis of time-sensitive networks to address four key requirements, specifically, bounded worst-case delay and delay jitter (defined as the difference between worst-case and best-case delays), zero congestion loss, and in-order packet delivery. In time-sensitive networks, source flows are constrained by the number of packets. A common approach for obtaining a delay bound is to derive a bit-level arrival curve from a packet-level arrival curve, and then to use network calculus. However, such a method is not tight: we show that better bounds can be obtained by directly exploiting the arrival curves expressed at the packet level. By exploiting the information on the packet transmission rate, our analysis method also leads to better bounds when flows are constrained with bit-level arrival curves. Second, we focus on the computation of delay and backlog bounds for an asynchronous configuration of IEEE Time-Sensitive Networking with a Credit-Based Shaper (CBS) and Asynchronous Traffic Shaping (ATS). ATS is an implementation of the interleaved regulator that regulates traffic in the network before admitting it into a CBS buffer, thus avoiding burstiness cascades. Due to the interleaved regulator, traffic is regulated at every switch, which allows for the computation of explicit delay and backlog bounds. Furthermore, we obtain a per-flow bound for the response time of CBSs by deriving novel results on service curves and credit bounds for CBSs. We also compute a per-flow bound on the response time of the interleaved regulator. Using the above results, we compute bounds on the per-class backlogs. Then, we use the newly computed delay bounds, along with recent results on interleaved regulators from the literature, to derive tight end-to-end delay bounds; then, we show that these derived bounds are less than the sums of per-switch delay bounds. Third, we analyze the effects of re-sequencing buffers, used to provide in-order packet delivery in time-sensitive networks. To provide worst-case guarantees, up until recently, there has not been a precise understanding of per-flow reordering metrics or of the dimensioning of re-sequencing buffers. We show that a previously proposed per-flow metric, called reordering late time offset (RTO), determines the timeout value. If the network is lossless, another previously defined metric, called reordering byte offset (RBO), determines the required buffer. If packet losses cannot be ignored, the required buffer can be larger than RBO, and depends on the jitter, on the arrival curve of the flow at its source, and on the timeout. Then, we develop a calculus for computing the RTO for a flow path. Our method uses a novel relation with the jitter and the arrival curve, together with a decomposition of the path into non-order-preserving and order-preserving elements...