Notice détaillée
Titre
MSIC-LAB
Formal Name (French)
Laboratoire des circuits intégrés à signaux mixtes
Formal Name (English)
Mixed-Signal Integrated Circuits Lab
Lab Manager
Choo, Kyojin
Group ID
U14168
Auteurs affilié
Choo, Kyojin
Enz, Christian
Jin, Menghe
Kye, Chanho
Pellaton Bourquin, Chady Chantal
Wang, Yuqi
Zhou, Yuxuan
Zhu, Yifan
Enz, Christian
Jin, Menghe
Kye, Chanho
Pellaton Bourquin, Chady Chantal
Wang, Yuqi
Zhou, Yuxuan
Zhu, Yifan
Institut
IEM
Faculté
STI
Lien extérieur
https://sti.epfl.ch/
Publications
27.2 An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction Gain
5.2 Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT Applic[...]
A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification
A 4.7μW switched-bias MEMS microphone preamplifier for ultra-low-power voice interfaces
A Fully Integrated Counter Flow Energy Reservoir for Peak Power Delivery in Small Form-Factor Sensor Systems
A Maximum-Likelihood Sequence Detection Powered ADC-Based Serial Link
A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector
A Noise-Efficient Neural Recording Amplifier Using Discrete-Time Parametric Amplification
A start-up boosting circuit with 133× speed gain for 2-transistor voltage reference
Pipeline and SAR ADCs for Advanced Nodes
Voir toutes les publications (30)
5.2 Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT Applic[...]
A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification
A 4.7μW switched-bias MEMS microphone preamplifier for ultra-low-power voice interfaces
A Fully Integrated Counter Flow Energy Reservoir for Peak Power Delivery in Small Form-Factor Sensor Systems
A Maximum-Likelihood Sequence Detection Powered ADC-Based Serial Link
A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector
A Noise-Efficient Neural Recording Amplifier Using Discrete-Time Parametric Amplification
A start-up boosting circuit with 133× speed gain for 2-transistor voltage reference
Pipeline and SAR ADCs for Advanced Nodes
Voir toutes les publications (30)
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