Loading...
conference paper
A 510nW 0.41V Low-Memory Low-Computation Keyword-Spotting Chip Using Serial FFT-Based MFCC and Binarized Depthwise Separable Convolutional Neural Network in 28nm CMOS
January 1, 2020
2020 Ieee International Solid- State Circuits Conference (Isscc)
Type
conference paper
Web of Science ID
WOS:000570129800087
Authors
Shan, Weiwei
•
•
Xu, Jiaming
•
Lu, Yicheng
•
Zhang, Shuai
•
Wang, Tao
•
Yang, Jun
•
Shi, Longxing
•
Seok, Mingoo
Publication date
2020-01-01
Publisher
Published in
2020 Ieee International Solid- State Circuits Conference (Isscc)
ISBN of the book
978-1-7281-3204-4
Publisher place
New York
Series title/Series vol.
IEEE International Solid State Circuits Conference
Start page
230
End page
232
Peer reviewed
REVIEWED
EPFL units
Event name | Event place | Event date |
San Francisco, CA | Feb 16-20, 2020 | |
Available on Infoscience
October 2, 2020
Use this identifier to reference this record