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  4. Design and Implementation of a Neural Network Based Predistorter for Enhanced Mobile Broadband
 
conference paper

Design and Implementation of a Neural Network Based Predistorter for Enhanced Mobile Broadband

Tarver, Chance
•
Balatsoukas-Stimming, Alexios  
•
Cavallaro, Joseph R.
January 1, 2019
Proceedings Of The 2019 Ieee International Workshop On Signal Processing Systems (Sips 2019)
33rd IEEE International Workshop on Signal Processing Systems (IEEE SiPS)

Digital predistortion is the process of using digital signal processing to correct nonlinearities caused by the analog RF front-end of a wireless transmitter. These nonlinearities contribute to adjacent channel leakage, degrade the error vector magnitude of transmitted signals, and often force the transmitter to reduce its transmission power into a more linear but less power-efficient region of the device. Most predistortion techniques are based on polynomial models with an indirect learning architecture which have been shown to be overly sensitive to noise. In this work, we use neural network based predistortion with a novel neural network training method that avoids the indirect learning architecture and that shows significant improvements in both the adjacent channel leakage ratio and error vector magnitude. Moreover, we show that, by using a neural network based predistorter, we are able to achieve a 42% reduction in latency and 9.6% increase in throughput on an FPGA accelerator with 15% fewer multiplications per sample when compared to a similarly performing memory-polynomial implementation.

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Type
conference paper
DOI
10.1109/SiPS47522.2019.9020606
Web of Science ID

WOS:000554872400051

Author(s)
Tarver, Chance
Balatsoukas-Stimming, Alexios  
Cavallaro, Joseph R.
Date Issued

2019-01-01

Publisher

IEEE

Publisher place

New York

Published in
Proceedings Of The 2019 Ieee International Workshop On Signal Processing Systems (Sips 2019)
ISBN of the book

978-1-7281-1927-4

Start page

296

End page

301

Subjects

digital predistortion

•

neural networks

•

fpga

•

model

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
IEL  
Event nameEvent placeEvent date
33rd IEEE International Workshop on Signal Processing Systems (IEEE SiPS)

Nanjing, PEOPLES R CHINA

Oct 20-23, 2019

Available on Infoscience
August 20, 2020
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/170961
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