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research article

A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

Veerappan, Chockalingam
•
Charbon, Edoardo
September 18, 2015
IEEE Transactions on Electron Devices

In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves dark count rates of 1.5 cps/μm 2 at 11 V excess bias, while the photon detection probability (PDP) is greater than 40% from 460 to 600 nm. Through the operation at very high excess bias voltages, it is possible to reach the PDP compression point where sensitivity to the breakdown voltage is low, thus ensuring high PDP uniformity; this feature makes it, especially, suitable for multimegapixel SPAD arrays.

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Type
research article
DOI
10.1109/TED.2015.2475355
Author(s)
Veerappan, Chockalingam
Charbon, Edoardo
Date Issued

2015-09-18

Published in
IEEE Transactions on Electron Devices
Volume

63

Issue

1

Start page

65

End page

71

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

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August 13, 2018
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/147774
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