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conference paper

Cryo-CMOS for quantum computing

Charbon, E.  
•
Sebastiano, F.
•
Vladimirescu, A.
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February 2, 2017
2016 IEEE International Electron Devices Meeting (IEDM)
2016 IEEE International Electron Devices Meeting (IEDM)

Cryogenic CMOS, or cryo-CMOS circuits and systems, are emerging in VLSI design for many applications, in primis quantum computing. Fault-tolerant quantum bits (qubits) in surface code configurations, one of the most accepted implementations in quantum computing, operate in deep sub-Kelvin regime and require scalable classical control circuits. In this paper we advocate the need for a new generation of deep-submicron CMOS circuits operating at deep-cryogenic temperatures to achieve the performance required in a fault-tolerant qubit system. We outline the challenges and limitations of operating CMOS in near-zero Kelvin regimes and we propose solutions. The paper concludes with several examples showing the suitability of integrating fault-tolerant.qubits with CMOS.

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Type
conference paper
DOI
10.1109/IEDM.2016.7838410
Author(s)
Charbon, E.  
Sebastiano, F.
Vladimirescu, A.
Homulle, H.
Visser, S.
Song, L.
Incandela, R M.
Date Issued

2017-02-02

Published in
2016 IEEE International Electron Devices Meeting (IEDM)
Start page

13.5.1

End page

13.5.4

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
AQUA  
Event nameEvent placeEvent date
2016 IEEE International Electron Devices Meeting (IEDM)

San Francisco, CA, USA

December 3-7, 2016

Available on Infoscience
August 13, 2018
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/147749
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