conference paper
A back-illuminated 3D-stacked single-photon avalanche diode in 45nm CMOS technology
January 25, 2018
2017 IEEE International Electron Devices Meeting (IEDM)
We report on the world's first back-illuminated 3D-stacked single-photon avalanche diode (SPAD) in 45nm CMOS technology. This SPAD achieves a dark count rate of 55.4cps/μm 2 , a maximum photon detection probability of 31.8% at 600nm, over 5% in the 420-920nm wavelength range, and timing jitter of 107.7ps at 2.5V excess bias voltage and room temperature. To the best of our knowledge, these are the best results ever reported for any back-illuminated 3D-stacked SPAD technology.
Type
conference paper
Author(s)
Lee, M.-J.
Ximenes, A. R.
Padmanabhan, P.
Wang, T. J.
Huang, K. C.
Yamashita, Y.
Yaung, D. N.
Charbon, E.
Date Issued
2018-01-25
Published in
2017 IEEE International Electron Devices Meeting (IEDM)
Start page
16.6.1
End page
16.6.4
Editorial or Peer reviewed
REVIEWED
Written at
EPFL
EPFL units
| Event name | Event place | Event date |
San Francisco, CA, USA | December 2-6, 2017 | |
Available on Infoscience
August 13, 2018
Use this identifier to reference this record