Applications of a reconfigurable SPAD line imager

Single-photon avalanche diodes (SPADs) fabricated in standard CMOS processes enable cost-effective volume production of sensors capable of time-stamping individual photons with high accuracy. This capability makes the sensors ideally suited for applications employing time-correlated single photon counting (TCSPC), such as fluorescence lifetime imaging, fluorescence correlation spectroscopy, time-resolved Raman spectroscopy, positron emission tomography and many more. The LinoSPAD imaging system is based on a 256 pixel SPAD linear array detector tightly coupled to an FPGA for a fully reconfigurable imager architecture. A series of 15 imager systems composed of a SPAD sensor and an FPGA card have been manufactured and thoroughly characterized using a baseline architecture. The low cost FPGA used in our prototyping system implements an array of 64 time-to-digital converters with a resolution of 25 ps over a span of 4 ms. A set of 4 pixels share a TDC with dedicated memory to record individual event timestamps or histograms of photon arrival times. A histogram processing engine is built into the FPGA to correct for most non-linearities inherent to the FPGA TDC architecture. We present system details and characterization results of our small series of systems, where we measured breakdown voltage, DCR, PDP for each pixel. This allows us to quantify the parameter spread in a single sensor as well as between multiple sensors. Furthermore, we present some of the possible applications (single-photon and coincidence counting, 3D TOF, FLIM, etc.) and selected results from our collaborations with several users.


Published in:
Proc. SPIE 10539, Photonic Instrumentation Engineering V, 3
Presented at:
SPIE OPTO, San Francisco, CA, United States, 2018
Year:
Mar 14 2018
Other identifiers:
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 Record created 2018-08-13, last modified 2019-08-12


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