645 V quasi-vertical GaN power transistors on silicon substrates
Liu, Chao; Khadar, Riyaz Abdul; Matioli, Elison
2018

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Abstract

In this paper, we present GaN-on-Si vertical transistors consisting of a 6.7 pm thick n-p-n heterostructure grown on 6-inch silicon substrates by MOCVD. The fabricated vertical trench gate MOSFETs exhibited E-mode operation with a threshold voltage of 3.3 V and an on/off ratio of over 108. A specific on-resistance of 6.8 mSL"cm2 and a high off-state breakdown voltage of 645 V were achieved. These results show the great potential of the GaN-on-Si platform for the next generation of cost-effective power electronics.

Details

Title 645 V quasi-vertical GaN power transistors on silicon substrates
Author(s) Liu, Chao ; Khadar, Riyaz Abdul ; Matioli, Elison
Published in 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)
Pages 240-243
Conference 30th IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), Chicago, IL, May 13-17, 2018
Date 2018-05-13
DOI https://doi.org/10.1109/ISPSD.2018.8393647
Other identifier(s) View record in Web of Science
Laboratories POWERLAB
Record Appears in Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > POWERLAB - Power and Wide-band-gap Electronics Research Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date 2018-08-08

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