High-level system synthesis and optimization of dataflow programs for MPSoCs

The growing complexity of digital signal processing applications make a compelling case the use of high-level design and synthesis methodologies for the implementation on reconfigurable and embedded devices. Past research has shown that raising the level of abstraction of design stages does not necessarily gives penalties in terms of performance or resources. Dataflow programs provide behavioral descriptions capable of expressing both sequential and parallel algorithms and enable natural design abstractions, modularity, and portability. In this paper, a tool implementing dataflow programs onto embedded heterogeneous platforms by means of high-level synthesis, software synthesis and interface synthesis is presented for MPSoCs platfroms.

Published in:
2016 50th Asilomar Conference on Signals, Systems and Computers, 417-421
Nov 06 2016

 Record created 2018-03-13, last modified 2020-10-25

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