Notice détaillée
Titre
Kang, Kyungsu
Sciper ID
217727
Publications
A High-throughput and Low-Latency Interconnection Network for Multi-Core Clusters with 3-D Stacked L2 Tightly-Coupled Data Memory
A Power-Efficient 3-D On-Chip Interconnect for Multi-Core Accelerators with Stacked L2 Cache
Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory
Runtime 3-D Stacked Cache Management for Chip-Multiprocessors
Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache
A Power-Efficient 3-D On-Chip Interconnect for Multi-Core Accelerators with Stacked L2 Cache
Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory
Runtime 3-D Stacked Cache Management for Chip-Multiprocessors
Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache
Toutes les ressources
Toutes les ressources
Le document apparaît dans
Authorities > People