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research article
A compact and low loss Y-junction for submicron silicon waveguide
2013
We designed a compact, low-loss and wavelength insensitive Y-junction for submicron silicon waveguide using finite difference time-domain (FDTD) simulation and particle swarm optimization (PSO), and fabricated the device in a 248 nm complementary metal-oxide-semiconductor (CMOS) compatible process. Measured average insertion loss is 0.28 ± 0.02 dB, uniform across an 8-inch wafer. The device footprint is less than 1.2 μm x 2 μm, an order of magnitude smaller than typical multimode interferometers (MMIs) and directional couplers.
Type
research article
Authors
Zhang, Yi
•
Yang, Shuyu
•
Lim, Andy Eu-Jin
•
Lo, Guo-Qiang
•
•
Baehr-Jones, Tom
•
Hochberg, Michael
Publication date
2013
Publisher
Published in
Volume
21
Issue
1
Article Number
1310
Peer reviewed
REVIEWED
EPFL units
Available on Infoscience
December 1, 2017
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