Inexact-Aware Architecture Design for Ultra-Low Power Bio-Signal Analysis

This paper introduces an inexact, but ultra-low power, computing architecture devoted to the embedded analysis of bio-signals. The platform operates at extremely low voltage supply levels to minimize energy consumption. In this scenario, the reliability of SRAM memories cannot be guaranteed when using conventional 6-transistor implementations. While error correction codes and dedicated SRAM implementations can ensure correct operations in this near-threshold regime, they incur in significant area and energy overheads, and should therefore be employed judiciously. Herein, we propose a novel scheme to design inexact computing architectures that selectively protects memory regions based on their significance, i.e., their impact on the end-to-end quality of service, as dictated by the bio-signal application characteristics. We illustrate our scheme on an industrial benchmark application performing the power spectrum analysis (PSA) of electrocardiograms. Experimental evidence showcases that a significance-based memory protection approach leads to a small degradation in the output quality with respect to an exact implementation, while resulting in substantial energy gains, both in the memory and the processing subsystem.

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IET Computers & Digital Techniques
Hertford, Inst Engineering Technology-Iet

 Record created 2016-04-11, last modified 2018-01-28

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