DFT-based Synchrophasor Estimation Algorithms and their Integration in Advanced Phasor Measurement Units for the Real-time Monitoring of Active Distribution Networks

The increasing penetration of Distributed Energy Resources (DERs) at the low and medium-voltage levels is determining major changes in the operational procedures of distribution networks (DNs) that are evolving from passive to active power grids. Such evolution is causing non-negligible problems to DN operators (DNOs) and calls for advanced monitoring infrastructures composed by distributed sensing devices capable of monitoring voltage and current variations in real-time. In this respect, Phasor Measurement Units (PMUs) definitely represent one of the most promising technologies. Their higher accuracy and reporting rates compared to standard monitoring devices, together with the possibility of reporting time-tagged measurements of voltage and current phasors, enable the possibility to obtain frequent and accurate snapshots of the status of the monitored grid. Nevertheless, the applicability of such technology to DNs has not been demonstrated yet since PMUs where originally conceived for transmission network applications. Within this context, this thesis first discusses and derives the requirements for PMUs expected to operate at power distribution level. This study is carried out by analyzing typical operating conditions of Active Distribution Networks (ADNs). Then, based on these considerations, an advanced synchrophasor estimation algorithm capable of matching the accuracy requirements of ADNs is formulated. The algorithm, called iterative-interpolated DFT (i-IpDFT) improves the performances of the Interpolated-DFT (IpDFT) method by iteratively compensating the effects of the spectral interference produced by the negative image of the spectrum and at the same time allows to reduce the window length up to two periods of a signal at the nominal frequency of the power system. In order to demonstrate the low computational complexity of such an approach, the developed algorithm has been subsequently optimized to be deployed into a dedicated FPGA-based PMU prototype. The influence of the PMU hardware components and particularly the effects of the stability and reliability of the adopted UTC-time synchronization technology have been verified. The PMU prototype has been metrologically characterized with respect to the previously defined operating conditions of ADNs using a dedicated PMU calibrator developed in collaboration with the Swiss Federal Institute of Metrology (METAS). The experimental validation has verified the PMU compliance with the class-P requirements defined in the IEEE Std. C37.118 and with most of the accuracy requirements defined for class-M PMUs with the exception of out of band interference tests.

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