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  4. Induction for SMT Solvers
 
conference paper

Induction for SMT Solvers

Reynolds, Andrew  
•
Kuncak, Viktor  
Dsouza, D
•
Lal, A
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2015
Verification, Model Checking, And Abstract Interpretation (Vmcai 2015)
16th International Conference on Verification, Model Checking, and Abstract Interpretation (VMCAI)

Satisfiability modulo theory solvers are increasingly being used to solve quantified formulas over structures such as integers and term algebras. Quantifier instantiation combined with ground decision procedure alone is insufficient to prove many formulas of interest in such cases. We present a set of techniques that introduce inductive reasoning into SMT solving algorithms that is sound with respect to the interpretation of structures in SMT-LIB standard. The techniques include inductive strengthening of conjecture to be proven, as well as facility to automatically discover subgoals during an inductive proof, where subgoals themselves can be proven using induction. The techniques have been implemented in CVC4. Our experiments show that the developed techniques have good performance and coverage of a range of inductive reasoning problems. Our experiments also show the impact of different representations of natural numbers and quantifier instantiation techniques on the performance of inductive reasoning. Our solution is freely available in the CVC4 development repository. In addition its overall effectiveness, it has an advantage of accepting SMT-LIB input and being integrated with other SMT solving techniques of CVC4.

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Type
conference paper
DOI
10.1007/978-3-662-46081-8_5
Web of Science ID

WOS:000354784200005

Author(s)
Reynolds, Andrew  
Kuncak, Viktor  
Editors
Dsouza, D
•
Lal, A
•
Larsen, Kg
Date Issued

2015

Publisher

Springer-Verlag

Publisher place

Berlin

Published in
Verification, Model Checking, And Abstract Interpretation (Vmcai 2015)
ISBN of the book

978-3-662-46081-8

978-3-662-46080-1

Total of pages

19

Series title/Series vol.

Lecture Notes in Computer Science; 8931

Start page

80

End page

98

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LARA  
Event nameEvent placeEvent date
16th International Conference on Verification, Model Checking, and Abstract Interpretation (VMCAI)

Mumbai, INDIA

JAN 12-14, 2015

Available on Infoscience
September 28, 2015
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/119187
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