Minority carriers diffusion currents are particularly important in parasitic substrate couplings of Smart Power ICs. In CMOS technologies the P-substrate potential is imposed by P+ contacts and N-wells by N+ highly doped implantations. The doping concentration discontinuity of these contact regions can have a big impact on parasitic diffusion currents of minority carriers. This work gives a description of these effects by device physical simulations of PN junctions under different injection levels of minority carriers. The perturbation of boundary conditions for electrons diffusion is also studied inside the substrate bulk in case a highly-doped substrate is used for high-voltage technologies.