A Fully-Integrated IC with 0.85-uW/Channel Consumption for Epileptic iEEG Detection

Feature extraction from a multichannel compressed neural signal is introduced in this brief. Compressive sensing (CS) is an efficient method for reducing the transmission data rate of sparse biological signals and lowering the power consumption of resource-constrained sensor nodes. However, recovering the original signal from compressed measurements is typically achieved by relatively complex and optimization-based algorithms, which is hardly suitable for real-time applications. The previously proposed multichannel CS scheme enables the area-efficient implementation of CS. In this brief, a low-power feature extraction method based on line length is directly applied in the compressed domain. This approach exploits the spatial sparsity of the signals recorded by adjacent electrodes of a sensor array and detects the seizure onset for every sixteen channels of the array. The proposed circuit architecture is implemented in a UMC 0.18-μm CMOS technology. Extensive performance analysis and design optimization enable a low-power and compact implementation. The proposed feature extractor reaches a perfect sensitivity of 100% for 420 h of clinical data containing 23 seizures from four patients, with an average false alarm rate of 0.34 h-1 for artifact-free channels, consuming 0.85 μW of power/channel at a compression rate of 16.

Published in:
IEEE Transactions on Circuits and Systems II: Express Briefs, 62, 2, 114-118
Piscataway, Ieee-Inst Electrical Electronics Engineers Inc

 Record created 2014-11-17, last modified 2018-09-13

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