Résumé

In this work, the design of a passive UHF RFID tag for sensor applications is described. The system level design issues are discussed taking into account the possible operation scenarios. Among the blocks in the tag, the emphasis is on the design of the rectifier and the capacitive sensor interface. The three-stage, differential-input rectifier is designed to generate the supply voltage with input levels as low as -13 dBm. The power conversion efficiency of the rectifier is 70%, driving a 30 k Omega load at -13 dBm source power. The fully-digital capacitive sensor interface designed to operate with a humidity sensor, can work with supply voltages as low as 0.8 V with good linearity and a power consumption of 12 mu W. The tag is capable of getting linear sensor readout under input power levels as low as -9 dBm. The circuits are implemented in 0.18 mu m UMC CMOS process.

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