Configurable Logic Gates Using Polarity Controlled Silicon Nanowire Gate-All-Around FETs
This work demonstrates the first fabricated 4-transistor logic gates using polarity-configurable, gate-all- around silicon nanowire transistors. This technology enhances conventional CMOS functionality by adding the degree of free- dom of dynamic polarity control (n or p-type). In addition, devices are fabricated with low, uniform doping profiles, reducing constraints at scaled technology nodes. We demonstrate through measurements and simulations how this technology can be applied to fabricate logic gates with fewer resources than CMOS. Specifically, full-swing output XOR and NAND logic gates are demonstrated using the same physical 4-transistor circuit.
Record created on 2014-03-27, modified on 2016-08-09