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research article
Modeling Asymmetric Operation in Double-Gate Junctionless FETs by Means of Symmetric Devices
This paper aims to model asymmetric operation in double gate junctionless FETs. Following a rigorous approach, we find that asymmetric operation can be simulated by combining two symmetric junctionless FETs, what we call the virtual symmetric device concept. In addition to the benefits in terms of compactness and coherence, such equivalence is used to develop a complete charge based model for independent double gate junctionless architectures, including mismatch in gate capacitances and material work functions.
Type
research article
Web of Science ID
WOS:000346573600004
Authors
Publication date
2014
Published in
Volume
61
Issue
12
Start page
3962
End page
3970
Peer reviewed
REVIEWED
EPFL units
Available on Infoscience
February 4, 2014
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