A DAC Mismatch Calibration Technique for Multibit Sigma Delta Modulators

A technique for the calibration of DAC (digital to analog converter) mismatch errors in multi-bit Sigma Delta modulators (SDM) is presented. It consists of two parts: the first is a measurement technique to obtain the relative mismatch of each feedback DAC element. The second is a correction method applied to the modulator output to correct for the effect of DAC non linearity. The proposed technique works completely in the background. The paper presents a detailed analysis of the possible error sources affecting the accuracy of the calibration, as well as a comparison with other state of the art techniques. The technique is applied to a 3rd order SDM showing almost ideal characteristics after calibration.


Published in:
2013 IEEE 11Th International New Circuits And Systems Conference (Newcas)
Presented at:
11th IEEE International New Circuits and Systems Conference (NEWCAS), Paris, FRANCE, JUN 16-19, 2013
Year:
2013
Publisher:
New York, Ieee
ISBN:
978-1-4799-0620-8
Keywords:
Laboratories:




 Record created 2014-01-09, last modified 2018-03-17


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