Live demonstration: High level software and hardware synthesis of dataflow programs

This paper describes and demonstrates a toolchain which enables HW-SW co-synthesis from a single high-level dataflow program. This toolchain does not only enable rapid-prototyping of complex designs, but also provides a complete system integration framework including synthesis of SW-HW interconnect. This framework minimizes the designer efforts for a low level implementation. A co-design example of a JPEG codec is demonstrated using a high-level dataflow language, named CAL.


Présenté à:
2013 IEEE International Symposium on Circuits and Systems (ISCAS),, Beijing, China, 19-23 May 2013
Année
2013
Mots-clefs:
Laboratoires:




 Notice créée le 2013-09-30, modifiée le 2018-03-17


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