Heavily Doped Junctionless Vertical Slit FETs with Slit Width Below 20 nm
2013
Abstract
This paper reports an alternative simple fabrication process for twin gate junctionless Vertical Slit Field Effect Transistors. N-type devices have been successfully manufactured on SOI substrates with a doping density 5×1018 atoms/cm3. The devices demonstrate up to six decades of Ion/Ioff ratio and a sub- threshold swing of 90 mV/decade relative to a slit width of approximately 10 nm.
Details
Title
Heavily Doped Junctionless Vertical Slit FETs with Slit Width Below 20 nm
Author(s)
Barbut, Lucian ; Jazaeri, Farzan ; Bouvet, Didier ; Sallese, Jean-Michel
Published in
Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference
Pages
397-400
Conference
Mixed Design of Integrated Circuits & Systems, 2013 MIXDES'13. MIXDES-20th International Conference, Gdynia, Poland, 20-22 June, 2013
Date
2013
ISBN
978-83-63578-00-8
Keywords
Laboratories
EDLAB
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > EDLAB - Group of Electron Device Modeling and Technology
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date
2013-08-07