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conference paper
Heavily Doped Junctionless Vertical Slit FETs with Slit Width Below 20 nm
2013
Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference
This paper reports an alternative simple fabrication process for twin gate junctionless Vertical Slit Field Effect Transistors. N-type devices have been successfully manufactured on SOI substrates with a doping density 5×1018 atoms/cm3. The devices demonstrate up to six decades of Ion/Ioff ratio and a sub- threshold swing of 90 mV/decade relative to a slit width of approximately 10 nm.
Type
conference paper
Authors
Publication date
2013
Published in
Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference
ISBN of the book
978-83-63578-00-8
Start page
397
End page
400
Peer reviewed
REVIEWED
EPFL units
Event name | Event place | Event date |
Gdynia, Poland | 20-22 June, 2013 | |
Available on Infoscience
August 7, 2013
Use this identifier to reference this record